1. Field of the Invention
The present invention relates to systems and techniques for determining source patterns that illuminate photo-masks during photo-lithography.
2. Related Art
Lithography processing represents an essential technology for manufacturing Integrated Circuits (IC) and Micro-Electro-Mechanical Systems (MEMS) and Nano-Electro-Mechanical Systems (NEMS). Lithographic techniques are used to define patterns, which include geometries, features, shapes, etc., onto an integrated-circuit die, semiconductor wafer, or chips. These patterns are typically defined by: a set of contours, lines, boundaries, edges, curves, etc., which generally surround, enclose, and/or define the boundary of the various regions which constitute the patterns.
One existing lithographic technique is photolithography, in which images defined by photo-masks are printed onto an integrated-circuit die or one or more semiconductor wafers. Furthermore, another existing lithographic technique is maskless lithography, in which a write device directly prints a write pattern onto the integrated-circuit die or the one or more semiconductor wafers, thereby eliminating the need for photo-masks. Unfortunately, it is increasingly difficult to determine the write patterns, or to design and manufacture photo-masks.
In particular, demand for increased density of features on the integrated-circuit die and the one or more semiconductor wafers has resulted in the design of circuits with decreasing minimum dimensions. These trends have significantly increased the complexity of the computations necessary to determine the write patterns and/or the mask patterns (to which the photo-masks correspond), with a commensurate impact on computation time, processing requirements, and expense.
Furthermore, due to the wave nature of light, as dimensions approach sizes comparable to the wavelength of the light used in the photolithography processes, the resulting wafer patterns deviate from the corresponding photo-mask patterns and are accompanied by unwanted distortions and artifacts. Existing techniques (such as Optical Proximity Correction or OPC, and resolution enhancement technologies or RET) are used to pre-distort the mask patterns to improve resolution and/or a process window (e.g., a range of process conditions that result in acceptable yield) in a photolithography process. While these techniques may ensure that the wafer pattern is printed more accurately, determining the pre-distorted mask patterns is increasingly difficult, thereby exacerbating the computational complexity and the associated problems.
Recently, researchers have investigated additional design degrees of freedom that may allow these design challenges to be reduced or eliminated for a given wavelength of light, thereby facilitating an increase in the resolution (or a decrease the critical dimension) and/or improved process control. For example, the problem can be expanded to include the design of additional components or adding more complexity to the existing components in a lithographic system, as opposed to focusing solely on the write pattern or the mask pattern. However, using many existing techniques, this effort has been confounded by the computational complexity of the problem.
Hence, what is needed is a technique that facilitates the printing of images on integrated-circuit dies or semiconductor wafers without the above-described problems.